1. Field of the Invention
The present invention relates to a semiconductor device that includes a via for electrically connecting an underlying metal layer to another conductor, and a method of manufacturing such a semiconductor device.
2. Description of the Related Art
In a semiconductor device, a via serves to connect an interconnect, constituted of for example aluminum, to an electrode of a chip located in another layer. Such the via is formed by filling a conductive material in a via hole.
However, forming the via often incurs a problem that contact resistance between an interconnect and the via is increased. In order to solve this problem, Japanese Laid Open patent publication No. 2004-134610 proposes a technique of supplying a fluorinated gas which has a reducing effect in the via hole prior to filling the via hole with a metal material such as tungsten (W), so as to remove substances that cause the increase in resistance.